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dblp: Woojin Rim

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List of computer science publications by Woojin Rim

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View Woojin Rim’s professional profile on LinkedIn. LinkedIn is the world's largest business network, helping professionals like Woojin Rim discover inside ...

US A1 - Memory device including reference voltage generator...

patents.google.com

A memory device includes a first memory cell array including memory cells of a single-ended bitline structure, a second memory cell array including...

Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang, more. IEEE Journal of Solid-State Circuits Two 128 Mb dual-power-supply SRAM chips are fabricated in a 14 nm FinFET technology. A m and a m 6T ...

TDGS - "Jaeho Park"

juliette.lsi.us.es

Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang , Jaeho Park, Sunghyun Park ...

TDGS - "Sungho Park"

juliette.lsi.us.es

Taejoong Song, Woojin Rim, Sunghyun Park, Yongho Kim , Jonghoon Jung, Giyong Yang ...

Variation-aware low-power video processor design techniques —...

koreauniv.pure.elsevier.com

Woojin Rim ; Jinmo Kwon ; Jongsun Park. School of Electrical Engineering; Abstract. With recent advances in scaled CMOS process technology, CMOS VLSI systems …

Adaptive clock generation technique for variation-aware subthreshold...

koreauniv.pure.elsevier.com

· T1 - Adaptive clock generation technique for variation-aware subthreshold logics. AU - Rim, Woojin. AU - Choi, Woong. AU - Park, Jongsun. PY Y N2 - Subthreshold logic has become an attractive option in energy-constrained applications, where the key metric is energy consumption rather than operating speed or silicon area.

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