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Researchgate: Sarang Kazeminia
Orūmīyeh, west az., Iran
Education
IEICE SEARCH SYSTEM
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Sarang KAZEMINIA. †∗a). , Student Member, Morteza MOUSAZADEH. †. , Nonmember,. Kayrollah HADIDI. †. , Member, and Abdollah KHOEI. †. , Nonmember. SUMMARY. This paper presents a high speed single-stage latched com- parator which is scheduled in time for both amplification and latch oper-.
IEICE Trans - A Novel Open Loop Structure for Phase Shifting and...
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A Novel Open Loop Structure for Phase Shifting and Frequency Synthesizing Sarang KAZEMINIA Khayrollah HADIDI Abdollah KHOEI Publication IEICE TRANSACTIONS on
IEICE Trans
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Sarang KAZEMINIA Khayrollah HADIDI Abdollah KHOEI : Summary | Full Text:PDF (491.3KB) >> Buy this Article: pp PAPER A 3.2-GHz Down-Spread Spectrum Clock
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CNKI学术搜索是一个基于海量资源的跨学科、跨语种、跨文献类型的学术资源搜索平台，其资源库涵盖各类学术期刊、论文、报纸、专利、标准、年鉴、工具书等，旨在为国内外研究人员提供全面、权威、系统的知识网络。
Related Documents
14th IEEE International Conference on Electronics, Circuits, and...
researchr.org
[doi] · A Novel CMOS Wideband Auto-tuning Phase Shifter CircuitSaad M. Al-Shahrani [doi] · An Open Loop Phase Shifter and Frequency SynthesizerSarang Kazeminia, Khayrollah Hadidi [doi] · OTA Based Frequency Tuning SystemChrisostomos Kassimis, George Souliotis, Costas Psychalinos.
A 10-bit 50MS/s pipeline ADC based on kickback-rejected comparators...
www.ieeeexplore.ws
A 10-bit pipeline analog-to-digital converter is presented with the ability of converting small input peak-to-peak voltages of around 100mvolts. Two-Stage compa
IEICE Transactions - researchr journal
researchr.org
Sarang Kazeminia, Khayrollah Hadidi, Abdollah Khoei. A Novel Open Loop Structure for Phase Shifting and Frequency Synthesizing: :
Khayrollah Hadidi - researchr alias
researchr.org
Improved single-stage kickback-rejected comparator for high speed and low noise flash ADCs Sarang Kazeminia, Obalit Shino, Ehsan Haghighi, Khayrollah Hadidi.
Scientific Publications
Conference Sessions and Papers | ECCTD2013
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Sarang Kazeminia, Obalit Shino, Ehsan Haghighi and Khayrollah Hadidi. Improved Single-Stage Kikback-Rejected Comparator for High Speed and Low Noise Flash ADCs. No presentation due to visa problems. In this paper, the conventional single-stage latched comparator is improved for both high speed and low noise ...
DBLP - Sarang Kazeminia
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Sarang Kazeminia, Khayrollah Hadidi, Abdollah Khoei, Mohammad-Naghi Azarmanesh : Effect of bandgap energy temperature dependence on thermal ...
dblp: BibTeX records: Sarang Kazeminia
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List of computer science publications by BibTeX records: Sarang Kazeminia
Publications
Reanalyzing the basic bandgap reference voltage circuit considering...
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The basic bandgap reference voltage generator, BGR, is thoroughly analyzed and relations are reconstructed considering dependency of bandgap energy, Eg, to...
Miscellaneous
Sarang Kazeminia | LinkedIn
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working on a 14-bit 500MS/s ADC in a 0.18um CMOS process, 0.25GHz-to-4GHz low jitter PLL in a 0.18um CMOS process, A 500MS/s 600µW 300µm2 Single-Stage Gain-Improved and Kickback Noise Rejected Comparator in 0.35µm 3.3v CMOS Process Improved Single-Stage Kickback-Rejected ...
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This group is created by "Sarang Kazeminia" at the second half of the education year, The aim is preparing a good opportunity for discussion and file ...
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Sarang Kazeminia
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Sarang Kazeminia. Organization: Urmia University. Pages in this Program. Program · Program for Wednesday, August 26th · Disclaimer | Powered by EasyChair ...
جستجوی مقالات فارسی نوشته Sarang Kazeminia
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مقالات کنفرانس، همایش ها و ژورنالهای علمی در زمینه علوم مهندسی، کشاورزی، علوم اجتماعی و علوم پزشکی و سلامت
A 80MHZ-TO-410MHZ 16-PHASES DLL BASED ON IMPROVED DEAD-ZONE OPEN-LOOP...
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Transcription. 1 Journal of Circuits, Systems, and Computers World Scientific Publishing Company A 80MHZ-TO-410MHZ 16-PHASES DLL BASED ON IMPROVED DEAD-ZONE OPEN-LOOP PHASE DETECTOR AND REDUCED-GAIN CHARGE PUMP SARANG KAZEMINIA * Urumi Graduate Institute Urmia, West ...
A Novel Open Loop Structure for Phase Shifting and Frequency...
journals.flvc.org
A Novel Open Loop Structure for Phase Shifting and Frequency Synthesizing
A digitally assisted 20MHz–600MHz 16-phase DLL enhanced with dynamic...
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... assisted 20MHz–600MHz 16-phase DLL enhanced with dynamic gain control loop. more. COLLAPSE. Arash Hejazi, Sarang Kazeminia, Roozbeh Abdollahi.
Search Kazeminia
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Year Published in: The Journal of Information Systems and Telecommunication (JIST) Authors: Sarang Kazeminia - Khayrollah Hadidi - Abdollah Khoei
Improved single-stage kickback-rejected comparator for high speed and...
www.semanticscholar.org
The conventional single-stage latched comparator is improved for both high speed and low noise flash ADCs and the common mode level of output voltage is...
Journal Of Circuits, Systems, And Computers | AceMap
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2016 Proxy Bits For Low Cost Floating-Point Fused Multiply-Add Unit. http://dx.doi.org S Hyunpil Kim, Sangook Moon High Speed High Precision Voltage-Mode MAX And MIN Circuits. http://dx.doi.org ICECS Sarang Kazeminia, Abdollah Khoei, Kheirollah Hadidi.
Magiran
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Design and Manufacturing of a Low-Power Dual-Axis Sun Tracker Based on Novel Mechanical and Electrical Detectors (Text in Persian) Sarang Kazeminia * ...
Vol. E91-A, No. 2 February | IEICE Transactions on...
journals.flvc.org
... for Phase Shifting and Frequency Synthesizing · PDF Restricted Access. Sarang KAZEMINIA, Khayrollah HADIDI, Abdollah KHOEI,
The 24th Iranian Conference on Electrical Engineering (ICEE
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The 24th Iranian Conference on Electrical Engineering (ICEE 2016
th Iranian Conference on Electrical Engineering (ICEE 2010) Isfahan,...
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9 Adaptive RLS Algorithm for Nonlinearity Modeling in the Nanometrology System Saeed Olyaee, Mohammad Shams Esfand Abadi, Samaneh Hamedi and Fatemeh Finizadeh An 8-Bit 2.5GS/s D/A Converter in 0.35μ CMOS Technology with Improved Pipeline Structure Sarang Kazeminia, Roozbeh Abdollahi, Khayrollah ...
Reanalyzing the basic bandgap reference voltage circuit considering...
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Sarang Kazeminia, Khayrollah Hadidi, Abdollah Khoei · Details · Authors · Fields of science · Bibliography ... Sarang Kazeminia. Urmia University, Urmia, Islamic ...
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