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Naohito Kojima - Patents

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Naohito Kojima patents Recent bibliographic sampling of Naohito Kojima patents listed/published in the public domain by the USPTO (USPTO Patent Application #,Title):

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KABUSHIKI KAISHA TOSHIBA, Kanagawa, JP

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Midori TAKANO, Fumihiro MINAMI, and Naohito KOJIMA . An Efficient Timing-Driven Global Routing Method for Standard Cell Layout ...

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US B1 - Semiconductor integrated circuit device, semiconductor...

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Naohito Kojima: Semiconductor integrated circuit having an oblique global signal wiring and semiconductor integrated circuit wiring method: US * 14 Apr 2004:

US A - Parallel-to-serial signal converting apparatus and image...

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A parallel-to-serial signal converting apparatus which comprises: a logic circuit for converting first parallel bit signals of a low frequency to be...

US B1 - Data communication apparatus Google Patents

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In the conventional data communication apparatus, there has been arisen a flag emulation due to a false pattern similar to the pattern of the true flag...

Naohito - Norman - KOJIMA profile - OoCities

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(My *NOT* recent picture) Name: Naohito KOJIMA English Name: Norman (sounds like my real first name "Naohito"??) DOB: June,1965 (Tue) Height: 177cm(5 ft. 10 in.)

18th Asia and South Pacific Design Automation Conference (ASP-DAC...

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18th Asia and South Pacific Design Automation Conference ASP-DAC Date : Jan , Place: Pacifico Yokohama, Yokohama, Japan ... Naohito Kojima (Toshiba)

US A - Method for verifying hold time in integrated circuit...

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A method for verifying proper communication between a first circuit and a second circuit of an electronic device. First it is determined which global...

US B2 - Optimizing IC clock structures by minimizing clock...

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A process is provided for optimizing a clock net in the form of a tree having a root defined by a driver pin and a plurality of leaves defined by driven...

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