Telephone & Addresses
Kimiyoshi Usami, Menlo Park, Middle Ave
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Network Profiles
LinkedIn: Kimiyoshi Usami - 教授 - 芝浦工業大学 | LinkedIn
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Business Profiles
Researchgate: Kimiyoshi Usami
Kōtō-ku, Japan
patentbuddy: Kimiyoshi Usami
SHIBAURA INSTITUTE OF TECHNOLOGY, Kanagawa, JP
Books & Literature
MULTICORE SYSTEMS ON-CHIP - Ben Abadallah Abderazek - Google Books
books.google.co.uk
Kimiyoshi Usami, and Naoaki Ohkubo, A Design Approach for Fine-grained Run-Time Power Gating using Locally Extracted Sleep Signals, Proceedings of the ...
Official Gazette of the United States Patent and Trademark Office:...
books.google.co.uk
... THE SAME Masahiro Kanazawa, and Kimiyoshi Usami, both of Kanagawa-ken, Japan, assignors to Kabushiki Kaisha Toshiba, Kawasaki, Japan Filed Jun.
TRON Project 1988: Open-Architecture Computer Systems - Google Books
books.google.pt
... Takeyama 35 Kiichiro Tamaru 35l Hideo Tsubota 55 Kimiyoshi Usami 285 Tetsuo Wasano 145 Mitsuru Watabe 301 Masanobu Yuhara 317 Keywords Index ...
Related Documents
CiteSeerX — Automated Selective Multi-Threshold Design for Ultra-Low...
citeseerx.ist.psu.edu
Automated Selective Multi-Threshold Design for Ultra ... {Kimiyoshi Usami and Naoyuki Kawabe and ... {Automated Selective Multi-Threshold Design for Ultra …
Scientific Publications
dblp: International Symposium on Low Power Design 1995
dblp.uni-trier.de
Bibliographic content of International Symposium on Low Power Design 1995
CiteSeerX — Design methodology of ultra low-power MPEG4 codec core...
citeseer.ist.psu.edu
BibTeX @INPROCEEDINGS{Usami98designmethodology, author = {Kimiyoshi Usami and Mutsunori Igarashi and Takashi Ishikawa and Masahiro Kanazawa and Masafumi …
Publications
Dynamic VDD Switching Technique and Mapping Optimization in...
link.springer.com
This paper describes a dynamic VDD switching technique to reduce energy dissipation of Dynamically Reconfigurable Processors. Either high or low supply is...
Leakage in Nanometer CMOS Technologies | SpringerLink
link.springer.com
Benton Calhoun, James Kao, Anantha Chandrakasan. Pages PDF · Methodologies for Power Gating. Kimiyoshi Usami, Takayasu Sakurai. Pages
Miscellaneous
Kimiyoshi Usami | LinkedIn
www.linkedin.com
View Kimiyoshi Usami’s professional profile on LinkedIn. LinkedIn is the world's largest business network, helping professionals like Kimiyoshi Usami discover ...
Publications - Hiroshi Sasaki
sites.google.com
Hiroshi Sasaki, Masaaki Kondo, and Hiroshi Nakamura, ... Hiroshi Sasaki, Hideharu Amano, Kimiyoshi Usami, Masaaki Kondo, Mitaro Namiki, and Hiroshi Nakamura,
Kimiyoshi Usami — Shibaura Institute of Technology
shibaura.pure.elsevier.com
Kimiyoshi Usami. Professor, Electrical Engineering and Computer Science; Functional Control Systems; Department of Information Science and Engineering;
TDGS - "Kimiyoshi Usami"
juliette.lsi.us.es
Atsushi Koshiba, Mikiko Sato, Kimiyoshi Usami, Hideharu Amano , Ryuichi Sakamoto, Masaaki Kondo ...
Kimiyoshi Usami
easychair.org
VLSI-SOC 2017: 25TH IFIP/IEEE INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION. PROGRAMINDEXES ...
NVMSA 2018
nvmsa18.github.io
Kimiyoshi Usami, Junya Akaike, Sosuke Akiba, Masaru Kudo, Hideharu Amano, Takeharu Ikezoe, Keizo Hiraga, Yusuke Shuto, Kojiro Yagami: "Energy efficient ...
COOLCHIPS XVI
www.coolchips.org
... Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo and Hiroshi Nakamura.
Advance Program | COOLChips XVIII
www.coolchips.org
Advance Program. Here, COOL Chips XVIII Final Program [pdf] is uploaded Hayate Okuhara, Kimiyoshi Usami, Hideharu Amano (Keio Univ.) 12:05-12:45:
COOL Chips VIII
www.coolchips.org
Chair: Kimiyoshi Usami (Shibaura Institute of Technology). Poster 1: A Hardware Design Verification Methodology Using Signal Transitions and Transactions.
Delay Modeling and Critical-Path Delay Calculation for MTCMOS...
journals.flvc.org
Delay Modeling and Critical-Path Delay Calculation for MTCMOS Circuits. Naoaki OHKUBO; Kimiyoshi USAMI. Requires Subscription PDF. Published
IEICE Proceeding Series
www.ieice.org
Satoshi Koyama, Seidai Takeda, Kimiyoshi Usami, ... Yusuke Umahashi, Yuki Kambayashi, Masaru Kato, Yohei Hasegawa, Hideharu Amano, Kimiyoshi Usami,.
Geyser: Energy-Efficient MIPS CPU Core with Fine-Grained Run-Time Power
www.taylorfrancis.com
Leakage power dissipation in LSI chips has been increasing exponentially with device scaling [14], and
has grown to be a major component in the total power
Level-Shifter-Less Approach for Multi-VDD SoC Design to ...www.springerprofessional.de › level-shifter-less-approa...
www.springerprofessional.de
Authors: Kimiyoshi Usami, Shunsuke Kogure, Yusuke Yoshida, Ryo Magasaki, Hideharu Amano. Publisher: Springer International Publishing. Published in: ...
AICT VLSI-SoC: Opportunities and Challenges Beyond the Internet...
hal.inria.fr
Kimiyoshi Usami, Shunsuke Kogure, Yusuke Yoshida, Ryo Magasaki, Hideharu Amano, Evaluating the Impact of Resistive Defects on FinFET-Based ...
The 12th Asia and South Pacific Design Automation Conference...
www.aspdac.com
... (Invited Paper) Plenary Talk --Overview on Low Power SoC Design Technology--. Author, *Kimiyoshi Usami (Shibaura Inst. of Tech., Japan).
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