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Ryan Hsin-Chin Jiang - Patents
www.freshpatents.com
Recent bibliographic sampling of Ryan Hsin-Chin Jiang patents listed/published in the public domain by the USPTO (USPTO Patent Application #,Title):
Business Profiles
patentbuddy: Hsin-Chin Jiang
AMAZING MICROELECTRONIC CORP., Taipei, TW, US
patentbuddy: Hsin Chin JIANG
TRANSIENT NOISE DETECTION CIRCUIT, Taipei City, TW, US
patentbuddy: Ryan Hsin-Chin Jiang
AMAZING MICROELECTRONIC CORP., Taipei, TW, US
patentbuddy: Ryan Hsin Chin Jiang
AMAZING MICROELECTRONIC CORP., Taipei City, TW, US
Property
US On-chip multiple-stage electrical overstress (EOS)...
patentscope.wipo.int
This patent search tool allows you not only to search the PCT database of about 2 million International Applications but also the worldwide patent collections....
Books & Literature
Hsin-Chin Jiang | XanEdu Customization Platform
www.academicpub.com
Author: Hsin-Chin Jiang. Results. An improved BJT-based silicon retina with tunable image smoothing capability IEEE By: Chung-Yu Wu; Hsin-Chin ...
Introduction to Microsystem Packaging Technology - Yufeng Jin,...
books.google.co.in
The multi-billion-dollar microsystem packaging business continues to play an increasingly important technical role in today’s information industry. The...
Official Gazette of the United States Patent and Trademark ...books.google.nl › books
books.google.nl
... Ming-Dou Ker, Hsinchu, Taiwan, and Hsin-Chin Jiang, Taipei, Taiwan, assignors to Industrial Technology Research Institute, Hsinchu, Taiwan Filed Jun.
Publications
SpringerCitations - Details Page
citations.springernature.com
Article. A 2-D velocity- and direction-selective sensor with BJT-based silicon retina and temporal zero-crossing detector. Hsin-Chin Jiang and Chung-Yu Wu.
Airiti Library華藝線上圖書館
www.airitilibrary.com
連結：; [5] Ming-Dou Ker, Hsin-Chin Jiang and Chyh-Yih Chang, “Design on the Low-Capacitance Bond Pad for High-frequency I/O Circuits in CMOS Technology ...
Miscellaneous
US A1 - On-chip latch-up protection circuit
patents.google.com
An on-chip latch-up protection circuit. The lath-up protection circuit includes a core circuit, a power switch, and a current extractor. The power switch...
US A1 - Bonding pad structure to avoid probing damage...
patents.google.com
A bonding pad structure to avoid probing damage applied to IC or PCB products comprises a first pad and at least one second pad. The first pad is coupled...
US B2 - ESD protection circuits for mixed-voltage buffers...
patents.google.com
Original Assignee, Zi-Ping Chen, Ming-Dao Ker, Hsin-Chin Jiang. Export Citation, BiBTeX, EndNote, RefMan. Patent Citations (11), Non-Patent ...
Active Device under Bond Pad to Save I/O Layout for High-pin-count...
www.sciweavers.org
... of IC products, especially for the high-pin-count system-on-a-chip (SOC). Ming-Dou Ker, Jeng-Jie Peng, Hsin-Chin Jiang. Display Traffic Map ...
Asymmetric bidirectional silicon-controlled rectifier - US ...patentswarm.com › patents
patentswarm.com
Inventors: Tang-Kuei Tseng, Che-Hao Chuang, Ryan Hsin-Chin Jiang, Ming-Dou Ker; Filing date: May , 12 years ago; Publication date ...
Patent and Trademark Office Notices
www.uspto.gov
Ming-Dou Ker ESD Protection Hsin-Chin Jiang Design With Turn-On Jeng-Jie Peng Restraining Method And Structures ,445 Jan. 18, Hanjoo Lee
US A1 - ESD protection circuit sustaining high ESD stress...
patents.google.com
Original Assignee, Ming-Dou Ker, Che-Hao Chuang, Hsin-Chin Jiang. Export Citation, BiBTeX, EndNote, RefMan. Referenced by (12), Classifications (9), Legal ...
US B2 - Power-rail ESD protection circuit with ultra low gate...
patents.google.com
An ESD protection circuit including a clamping module and a detecting module is provided. The clamping module is coupled between a positive power line...
US A1 - Electrostatic discharge protection circuit with...
patents.google.com
An electrostatic discharge protection circuit that includes a first terminal, a second terminal, an electrostatic discharge device coupled between the...
Research Inventy
www.researchinventy.com
... Jeng-Jie Peng and Hsin-Chin Jiang, "Failure Analysis of ESD damage in a high-voltage driver IC and the effective ESD protection solution",
Usb shell electrostatic protection designguls.eu › frcoveralls › usb-shell-electrostatic-protection-...
guls.eu
Nov 1, The Protection Design for the System Level ESD The electromagnetic field generated by ESD. Shell. Ryan Hsin-Chin Jiang USB Port.
晶焱科技_ESD培训.pdf_淘豆网
www.taodocs.com
August AmazingAmazing MicroelectronicMicroelectronic Corp.Corp. TVSTVS ESDESD ARRAYARRAY ICsICs ProviderProvider August pany...
US A1 - Symmetric bidirectional silicon Googlewww.google.com.na › patents
patents.google.com
Inventor: Tang-Kuei TSENG: Che-Hao Chuang: Ryan Hsin-Chin Jiang: Ming-Dou Ker; Current Assignee. The listed assignees may be inaccurate. Google has ...
US B2 - ESD protection circuit with active triggering...
patents.google.com
An ESD protection circuit is provided. The circuit includes a discharging component, a diode, and an ESD detection circuit. The discharging component is...
US B2 - Bi-directional transient voltage suppression device and...
patents.google.com
A bidirectional transient voltage suppression device is disclosed. The bi-directional transient voltage suppression device comprises a semiconductor die....
US A1 - Bidirectional silicon-controlled rectifier...
patents.google.com
A bidirectional silicon-controlled rectifier, wherein the conventional field oxide layer, which separates an anode structure from a cathode structure, is...
US B2 - Dual-triggered electrostatic discharge protection...
patents.google.com
An integrated circuit that includes a signal pad, a clamping circuit including a first NMOS transistor having a drain, a source, a gate and a substrate,...
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