4 Advanced Combinational Circuit Design - De Gruyter
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[14] Hendrawan Soeleman, Kaushik Roy and Bipul C. Paul, “Robust subthreshold logic for ultra-low power operation.” IEEE Transactions on Very Large Scale ... › document › doi › pdf
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Hendrawan Soeleman: [Publications] [Author Rank by year] Kaushik Roy
IDD Waveforms Analysis for Testing of Domino and Low Bipul Chandra Paul
Robust ultra-low power sub-threshold DTMOS logic
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Digital CMOS logic operation in the sub-threshold region. In GLSVLSI : Hendrawan Soeleman, Kaushik Roy, Bipul Paul Robust ultra-low ...
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Hendrawan Soeleman, Kaushik Roy and Bipul C.paul,"Robust subthreshold
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Performance Analysis of Interconnect Drivers for Ultralow ...
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... voltage for ultra low energy applications REFERENCES [1] Hendrawan Soeleman, Kaushik Roy and Bipul C.paul,”Robust subthreshold logic for ultralow power ... › ideseditor › performance-a...
Exploring CMOS logic families in sub-threshold region for
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[6] Hendrawan Soeleman, Student Member, IEEE, Kaushik Roy, Senior Member, IEEE, and Bipul C. Paul, Member, IEEE “Robust Sub. › Papers › Version-2
Reliable Chip Design from Low Powered Unreliable CORA
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by SK Grandhi · — [128] Hendrawan Soeleman, Kaushik Roy, and Bipul C Paul. Robust subthreshold logic for ultra-low power operation. Very Large Scale Integration (VLSI) ... › bitstream › handle › satish_ph...
Robust ultra-low power sub-threshold DTMOS logic - researchr...
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@inproceedings{SoelemanRP00, title = {Robust ultra-low power sub-threshold DTMOS logic}, author = {Hendrawan Soeleman and Kaushik Roy and Bipul ...
Dynamic Threshold MOSFET for Low Power VLSI Circuit Design
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[12] Hendrawan Soeleman, Kaushik Roy & Bipul C. Paul; “Robust Sub-Threshold Logic for Ultra-Low Power Operation” IEEE Transactions on VLSI systems, VOL.9, ... › ijet › article › view
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Electronic Edition (link) BibTeX · Hendrawan Soeleman, Kaushik Roy, Bipul Chandra Paul: Robust subthreshold logic for ultra-low power operation
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WO A1 - Element de circuit - Google Patents
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HENDRAWAN SOELEMAN ET AL.: "Robust subthreshold logic for ultra-low power operation", IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLS) SYSTEMS, vol. › patent
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Apr 27, — "Robust Subtreshold Logic for Ultra-Low Power Operation" af Hendrawan Soeleman, Kaushik Roy og Bipul C. Paul. › artikel › fremtidens-e...
Performance optimization of CNFET based subthreshold circuits
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[2] Hendrawan Soeleman, Kaushik Roy and Bipul C.paul, “Robust PDP(aJ) subthreshold logic for ultra-low power operation,” IEEE transactions ... › Performance_optimization...
Robust ultra-low power sub-threshold DTMOS logic - Typeset.io
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Hendrawan Soeleman 1, Kaushik Roy 1, Bipul C. Paul 1. Institutions (1). 31 Jul pp Abstract: Digital sub-threshold logic circuits have recently ... › papers
Subthreshold Circuit Performance Investigation under ...
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by M Hasan · — [7] Hendrawan Soeleman, Kaushik Roy and Bipul C.Paul, Robust subthreshold logic for ultralow power operation, IEEE Transactions on Very Large Scale ... › subthreshold-circuit-per...
Subthreshold circuits: Design, implementation and application
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by H Kanitkar · · Cited by 11 — [49] Hendrawan Soeleman, Kaushik Roy, and Bipul C. Paul. Robust subthreshold logic for ultra-low power operation. IEEE Transactions on VLSI ... › cgi › viewcontent
The practical engineer [IC design, power reduction] - J. Frenkil
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Cited 246 times. Robust subthreshold logic for ultra-low power operation. Hendrawan Soeleman, Kaushik Roy, Bipul C. Paul. Subthreshold conduction. › work
EP A Switching circuitry
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... A FUJITSU LTD [JP]; HENDRAWAN SOELEMAN ET AL.: 'Robust Subthreshold Logic for Ultra-Low Power Operation' IEEE TRANSACTIONS ON ...
Sub Threshold Shift Register Design Using Variable Threshold MOSFET...
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Robust Ultra-Low Power Sub-threshold DTMOS Logic Λ Hendrawan Soeleman, Kaushik Roy, and Bipul Paul Purdue University Department of Electrical and ...
SIGDA Super Compendium, ISLPED 2000, Table of Contents
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... (Carnegie Mellon). 1.4s: Robust Ultra-Low Power Sub-threshold DTMOS Logic [p. 25]: Hendrawan Soeleman, Kaushik Roy, Bipul Paul (Purdue University) ...
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