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Fredrick Jenne, 68, Silver Springs, E Highway 40
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Fredrick Jenne, 81, Sunnyvale, Lynxwood Ct
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Fredrick Jenne in Silver Springs, FL - (352) , |...
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Fredrick Jenne lives on E Highway 40 in Silver Springs, Florida. View phone number, full address and more on 411.info. Tel: (352) ,
Interests
U.S. Patents Awarded to Inventors in Colorado (Sept. 27)
www.tmcnet.com
The co-inventors are Ryan T. Hirose, Colorado Springs, Colo., Fredrick Jenne, Sunnyvale, Calif., Vijay Srinivasaraghavan, Colorado Springs, ...
Fredrick Jenne - Patents
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Fredrick Jenne patents Recent bibliographic sampling of Fredrick Jenne patents listed/published in the public domain by the USPTO (USPTO Patent Application #,Title):
Business Profiles
patentbuddy: Fredrick B Jenne
CYPRESS SEMICONDUCTOR CORPORATION, Sunnyvale, CA, US
patentbuddy: Fredrick Jenne
CYPRESS SEMICONDUCTOR CORPORATION, Sunnyvale, CA, US
patentbuddy: Fredrick L Jenne
CYPRESS SEMICONDUCTOR CORPORATION, Los Gatos, CA, US
Education
classmates: Fredrick Jenne
Escondido High School, Escondido, CA,
classmates: Daryl Jenne - Art Jenne - Classmates.com
... Michele Jenne · Keith Jenne · Kimberly Jenne · Jessica Jenne · Fredrick Jenne · Nancee Jenne · Doug Jenne · John Jenne · Diane Jenne · Melanie Jenne ...
Related Documents
Radical oxidation process for fabricating a nonvolatile charge trap...
www.freepatentsonline.com
A method for fabricating a nonvolatile charge trap memory device is described. The method includes subjecting a substrate to a first oxidation process to form...
Nitridation oxidation of tunneling layer for improved SONOS speed and...
www.freepatentsonline.com
A method for forming a tunneling layer of a nonvolatile trapped-charge memory device and the article made thereby. The method includes multiple oxidation and...
Non-volatile random access memory and methods for making and...
www.freepatentsonline.com
A memory cell includes non-volatile and volatile storage elements and is configured to dynamically alter threshold voltages of the non-volatile storage...
Oxide-nitride-oxide stack having multiple oxynitride layers - Cypress...
www.freepatentsonline.com
A semiconductor device including a silicon-oxide-oxynitride-oxide-silicon structure and methods of forming the same are provided. Generally, the structure...
Scientific Publications
Tunnel Transistors (epo) Patents and Patent Applications (Class...
patents.justia.com
Inventors: Fredrick B. Jenne, Sagy Charel Levy Tunnel transistor, logical gate including the transistor, static random-access memory ...
Reports & Statements
Wilhelm & Paulena Jenne - Genealogy.com
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Jenne: Looking for more information and descendants of th... Read more on Genealogy.com!
Miscellaneous
US B2 - Integration of non-volatile charge trap memory devices...
patents.google.com
A semiconductor structure and method to form the same. The semiconductor structure includes a substrate having a non-volatile charge trap memory device...
US A - Photon to digital converter using photon flux...
patents.google.com
Output voltage levels on precharged photo-diodes receiving light inputs are sampled after a period of time sufficient to permit photon flux integration....
US B2 - Nitridation oxidation of tunneling layer for improved...
patents.google.com
A method for forming a tunneling layer of a nonvolatile trapped-charge memory device and the article made thereby. The method includes multiple oxidation...
Fredrick Jenne, Sunnyvale US - Patent applications
www.patentsencyclopedia.com
Patent application number, Description, Published , Floating gate memory device with increased coupling coefficient - Methods and apparatus for ...
US B2 - Oxide-nitride-oxide stack having multiple oxynitride...
patents.google.com
A semiconductor device including a silicon-oxide-oxynitride-oxide-silicon structure and methods of forming the same are provided. Generally, the...
US B2 - Sense transistor protection for memory programming...
patents.google.com
A method and apparatus for protecting a sense transistor in a sense amplifier during memory programming and erase operations, and for increasing the...
US A - Method of making polysilicon resistors with a low...
patents.google.com
Method of making polysilicon resistors with a low thermal activation energy ... Fredrick Jenne: Sense transistor protection for memory programming: …
Inventors list Jd-Jf - Patent application
www.patentsencyclopedia.com
Fredrick B. Jenne, US, Los Gatos, Deuterated film ... Fredrick B. Jenne, US, Mountain House, SONOS ...
Method and apparatus for reduction of bit-line disturb and soft-erase...
www.patentsencyclopedia.com
Patent application title: Method and apparatus for reduction of bit-line disturb and soft-erase in a trapped-charge memory Inventors: Fredrick B. Jenne Agents: CYPRESS/BLAKELY;Blakely Sokoloff Taylor & Zafman LLP Assignees: Origin: SUNNYVALE, CA US IPC8 Class: AG11C1604FI USPC Class: Abstract: A method and device for trading off inhibit disturb against bit-line disturb in a non ...
US B2 - Floating gate memory device with increased coupling...
patents.google.com
Methods and apparatus for increasing the coupling coefficient of a floating gate memory device includes an MOS capacitors with self-aligning gate...
US A - Resistor with low thermal activation energy
patents.google.com
Patents Publication number ... Fredrick Jenne: Sense transistor protection for memory programming: US * 31 Dec 2007: 2 Jul 2009: Simtek:
SONOS ONO stack scaling - Patent application
www.patentsencyclopedia.com
Patent application title: SONOS ONO stack scaling Inventors: Fredrick B. Jenne (Sunnyvale, CA, US) Fredrick B. Jenne (Sunnyvale, CA, US) Sagy Levy (Zichron, IL)
Schedule A for Line #18 - Candidate & Committee Viewer - FEC
docquery.fec.gov
FREDRICK B JENNE, 366 N. ALTADENA STREET TRACY, California , CYPRESS SEMICONDUCTOR / ENGINEER, JFC TRANSFER: TRUMP MAKE ...
US A - Nonvolatile direct storage bistable circuit
patents.google.com
US *, 22 May 2008, 4 Dec 2008, Fredrick Jenne, Sense transistor protection for memory programming. US *, 11 Jul 2007, 15 Jan ...
US A - Means for controlling the gate potential of MNOS...
patents.google.com
... standby mode of operation. US *, 22 Մայիս 2008, 4 Դեկտեմբեր 2008, Fredrick Jenne, Sense transistor protection for memory programming.
US A - Semiconductor non-volatile memory with cut-off circuit...
patents.google.com
A semiconductor non-volatile memory device includes: a memory cell array having a plurality of memory cells, each including a non-volatile memory cell...
Floating gate memory device with increased coupling coefficient -...
www.patentsencyclopedia.com
Patent application title: Floating gate memory device with increased coupling coefficient Inventors: Fredrick Jenne (Sunnyvale, CA, US) Fredrick Jenne …
Sense transistor protection for memory programming - Patent...
www.patentsencyclopedia.com
Patent application title: Sense transistor protection for memory programming Inventors: Fredrick Jenne (Sunnyvale, CA, US) Fredrick Jenne (Sunnyvale, CA, US)
surname and names strating with the letter F
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surname and all names starting with the letter F.
US B2 - Memory transistor with multiple charge storing layers...
patents.google.com
,069: "SONOS Stack With Split Nitride Memory Layer" Fredrick Jenne et al. , filed ,461: "SONOS ONO Stack Scaling," Fredrick Jenne, filed Jul.
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